Microelectronic elements such as semiconductor chips are typically provided in packages which provide physical and chemical protection for the semiconductor chip or other microelectronic element. Such a package typically includes a package substrate such as a small circuit panel formed from a dielectric material and having electrically conductive terminals thereon. The chip is preferably mounted on the package substrate and electrically connected to the terminals of the package substrate. Typically, the chip and portions of the substrate are covered by an encapsulant or overmolding, so that only the terminal-bearing outer surface of the substrate remains exposed. The encapsulant commonly is molded in place on the dielectric layer so that the mass of encapsulant has a preselected shape, and so that the encapsulant covers the microelectronic device. The encapsulant may also cover features such as wire bonds which form part of the connection between the chip and the terminals. Such packages may be stacked. In a stacked assembly, individual chip packages or units are mounted one above the other in a common assembly. This common assembly can be mounted on an area of the circuit panel which may be equal to or just slightly larger than the area typically required to mount a single package or unit containing a single chip. This stacked package approach conserves space on the circuit panel.
One form of stacked package assembly which has been proposed heretofore is sometimes referred to as a “ball stack.” A ball stack assembly includes two or more individual units. Each unit incorporates a unit substrate similar to an individual package substrate, and one or more microelectronic elements mounted to the unit substrate and connected to the terminals on the unit substrate. The individual units are stacked one above the other, with the terminals on each individual unit substrate being connected to terminals on another unit substrate by electrically conductive bonding material such as solder balls, thus forming a plurality of vertical conductors. The terminals of the bottom unit substrate may constitute the terminals of the entire assembly or, alternatively, an additional substrate may be mounted at the bottom of the assembly which may have terminals connected to the terminals of the various unit substrates. Ball stack packages are depicted, for example, in certain preferred embodiments of U.S. Published Patent Applications 2003/0107118 and 2004/0031972, now U.S. Pat. Nos. 6,897,565 and 6,077,440 respectively, the disclosures of which are hereby incorporated by reference herein. The individual units in stacked packages can be permanently bonded in place by heating the assembly so as to melt or “reflow” the solder balls or otherwise activate the bonding material.
Despite all of the innovations discussed above, there remains room for improvement. There exists a need to better control the spacing between chip units in a stacked package. A ball stack package which undergoes reflow depends on forces such as surface tension of the molten solder and the weight of the units to bring the units to their final vertical spacing during reflow. Moreover, the individual units may be warped. If the warpage exceeds a certain amount, a solder ball on one unit will not contact the terminal on the adjacent unit during reflow, and the connection will not be made. Warpage may occur in either an upward or a downward direction. One side of each unit may warp downwardly, while the other side of the unit may warp upwardly. The bottom solder balls may collapse excessively due to weight. In addition, the height of the assembly may vary with variations in solder ball size, the exposed surface area of the terminals and the like. These and other factors may cause substantial variation in the height of assemblies which include many layers.